Development, bringup, calibration, documentation, module (A+D) testing.
Functional models for SoC and module-level verification, using Verilog/Verilog-AMS.
Multi-phase high speed SMPSs, chargers, LDOs, MBGs, GPIOs, ADCs, DACs, etc.
Any purpose, any complexity. Specialising in C++, Perl, and Verilog PLI/VPI.
Specification, Estimation, Planning, Tracking, Oversight, Release, Post-mortem.