Services

Analog Model Development

Development, bringup, calibration, documentation, module (A+D) testing.

Functional models for SoC and module-level verification, using Verilog/Verilog-AMS.

Multi-phase high speed SMPSs, chargers, LDOs, MBGs, GPIOs, ADCs, DACs, etc.

Tools/Scripts/Infrastructure

Any purpose, any complexity. Specialising in C++, Perl, and Verilog PLI/VPI.

Project Management

Specification, Estimation, Planning, Tracking, Oversight, Release, Post-mortem.